The present invention relates to power transistors of the vertical type, principal examples of which are metal oxide silicon field effect transistors (hereinafter MOSFETs) and insulated gate bipolar transistors (hereinafter IGBTs).
Known devices of this type include those having geometries such that multiple body regions are formed within a large drain area, or a large body region is formed to create multiple drain regions. Structures of the first type are exemplified by those disclosed in U.S. Pat. No. 5,008,725, while structures of the second type are exemplified by those disclosed in U.S. Pat. No. 4,823,176.
FIG. 1 is a cross sectional view of a portion of a MOSFET fabricated in accordance with the prior art. The type of MOSFET to which the invention is particularly to be applied is a power FET which is employed to produce a controlled current flow in a vertical direction between source and drain electrodes disposed at the top and bottom, respectively, of a semiconductor chip.
The MOSFET is constituted by a semiconductor substrate and the illustrated embodiment is an N channel device. It will be appreciated that the invention may be applied to P channel devices.
In the illustrated structure, the substrate has an N.sup.- body 2 in which is formed, at the surface 4 of the substrate, at least one P conductivity base region 6. Wherever base region 6 is not present, body 2 extends to surface 4. A PN junction 8 is created between body 2 and base region 6 and the part of base region 6 adjacent both surface 4 and junction 8 constitutes the channel region 10 where switching of the MOSFET is controlled.
Devices of the type here under consideration may have a structure such that a plurality of isolated base regions 6 are formed, by diffusion or implantation, so that the parts of N.sup.- body 2 which extend to surface 4 form a continuous matrix, or lattice, or such that a single base region 6 is produced in the form of a matrix or lattice, so that isolated parts of body 2 extend to surface 4. Hereinafter, for the sake of simplicity, region 6 will be referred to in the singular.
With the aid of suitable masking, an N.sup.+ emitter, or source, region 12 is formed in base region 6 to define the end of channel region 10 which is remote from junction 8. Region 12 extends along the entire horizontal periphery of junction 8. The central part of base region 6 is doped to have P+ conductivity.
Surface 4 is covered with an insulating layer 14 of SiO.sub.2, polycrystalline silicon gate regions 20 and a Boron Phosphorous Silicon Glass (BPSG) layer 22. Gate regions 20 and BPSG layer 22 are disposed above the locations where body 2 extends to surface 4 and can serve as a mask for diffusion of P conductivity material to form base region 6. In addition, regions 20 and layer 22 extend across channels 10 and terminate on regions 12 so that a source metal layer 24 deposited on layer 22 and the exposed portions of surface 4 will contact regions 12 and the P+ conductivity part of base region 6.
A problem common to known devices of this type is that they contain a parasitic bipolar transistor 26 associated with the, or each, emitter region 12. In such a bipolar transistor, region 12 constitutes the emitter, base region 6 forms the base and region 2 the collector. Such a parasitic bipolar transistor can reduce the ruggedness of a MOSFET in that it will cause the device to undergo a second breakdown when exposed simultaneously to a high current and a high voltage. In an IGBT, the parasitic bipolar transistor forms a four-layer structure which can latch at high currents.
In order to minimize the effect of this parasitic bipolar transistor, base region 6 should be doped as heavily as possible since this will create a corresponding reduction in the gain of the parasitic transistor. In prior art devices, the maximum doping which can be employed is limited primarily by threshold voltage requirements. Because the doping of channel region 10 is produced by lateral diffusion of the dopant forming base region 6, which lateral diffusion occurs beneath the edge of gate layer 20, an increase in the dopant concentration in base region 6 generally results in an increase in dopant concentration in channel 10, accompanied by a higher threshold voltage.